This page describes my research interests, and the work I do with the Accelerated Numerics group (both my own, and that of the rest of my group). There are two broad themes of research that I'm currently involved in (though, of course, this changes over time). The first theme is the development of tools and techniques for building FPGA accelerated financial applications, along with performance testing of applications we have built. Obviously the speedup over conventional solutions varies between applications, but we are typically finding that one FPGA can usually provide at least a 30x speedup over a quad-CPU system, and for some applications that rises to 100x.

The second research theme is the development of Random Number Generators (RNGs), but specifically RNGs that are optimised for FPGAs. We have found that many financial applications that map well to FPGAs are Monte-Carlo simulations, so it is necessary to have very fast and efficient generators: mapping existing software generators directly into hardware is usually a pretty poor choice. We attempt to design generators specifically for FPGA fabrics, customising for a bit-level parallel architecture, rather than an word-level sequential CPU.

One of the interesting results is that it turns out that FPGAs are really good at generating random-numbers - we can generate insane numbers of high-quality uniform bits per cycle, and even non-uniform distributions like the Gaussian and exponential are quite cheap. This reverses the balance seen in software, as floating-point operations become more expensive than random numbers. One of the aims of our research is to exploit this new balance, by finding new algorithms and architectures for Monte-Carlo, rather than blindly adapting existing software approaches.