Dr Pete Sedcole

Welcome

to my home page. I am a non-permanent Lecturer in the Circuits and Systems group of the Department of Electrical and Electronic Engineering at Imperial College London.

Professional Activities

On the 2nd of October 2008 I gave a tutorial on the impact of process variability on FPGAs at the Sophia Antipolis Microelectronics Forum. You can access the slides from the tutorial here.

I am a co-organiser of the DATE 2009 Conference Friday Workshop on Process Variability, which will take place in Nice, France on the 24th of April 2009. I was also a co-organiser of the last DATE Friday Workshop on the Impact of Process Variability on Design and Test. This took place in Munich, Germany, on the 14th of March 2008.

I serve on the programme committees of the Southern Conference on Programmable Logic (SPL), the International Conference on Field-Programmable Logic and Applications (FPL) and the International Workshop on Applied Reconfigurable Computing (ARC). I was Proceedings Chair for ARC in 2008, and am Publicity Co-Chair for ARC 2009.

I hold a place on the IET Executive Team for the Microelectronics and Embedded Systems Technical Professional Network. If you are interested in getting involved with an IET event in this area - as an organiser, speaker or even just attending - feel free to get in touch.

I was co-chair of the IET FPGA Developers' Forum, which took place at Savoy Place, London, on the 30th and 31st of October 2007.

Biography

I studied Electrical Engineering at the University of Canterbury in Christchurch, New Zealand, graduating with first class honours in 1999. After gaining my undergraduate degree I joined Trimble Navigation Ltd., a leading vendor of GPS equipment, as an Electronics Engineer. I spent an enjoyable three and a half years designing electronics for navigational guidance systems and handheld GPS products before leaving to undertake doctoral studies at Imperial College London. In autumn of 2004 I was fortunate enough to intern at the Xilinx Research Labs in San Jose, California, where I worked on new dynamic reconfiguration methods. I completed my PhD in April 2006, after which I worked as a Research Associate at Imperial College London mainly studying variability-adaptive design, particularly with FPGAs.

Contact details

Dr Pete Sedcole
EEE-CAS
Dept. Electrical and Electronic Engineering
Imperial College London
South Kensington campus
London SW7 2BT, United Kingdom

Phone: +44 (0) 20 7594 6303
Fax: +44 (0) 20 7581 4419
Email: pete · sedcole at imperial · ac · uk

Updated 17 October 2008