Research Projects


EU VICTORIA (Validation  platform for Integration of standardised Components , Technologies and tools in an  Open, modulaR and Improved Aircraft electronic system)

Role: Associate contractor (associated to Smiths Aerospace)

Duration:  18 months ( 12/2002- 6/2004)

Partners:  Thales, BAE Systems, Qinetic, Airbus, Alenia and many others (project web page)

Abstract:  Develop an accurate autonomous and intrinsically safe instrument for measuring fuel level in aircraft tanks


 

EPSRC project (GR/N65851) : SiGe for MOS Technologies  II Development and Applications   (HMOS II). 

Role: Principal investigator (with C. Toumazou as Co-investigator).
Duration: 3 years (2001-2004)
Partners: Daimler-Chrysler, Infineon, Mitel, U. Southampton, Warwick U. , Glasgow U, Sheffield U. , Newcastle U. , UMIST, Cambridge (project web page )

 Abstract: Development of a viable strained Si and SiGe base CMOS technology; evaluate the potential of HMOS for RF circuit design by designing process tolerant circuits for fabrication within the  project.   Emphasis on device evaluation and compact modelling, objective is demonstrator prototyping.

 

 

EPSRC project ( GR/L83561): Optoelectronic Crosspoint Switch (STAR) .

 

Role: Co-investigator (with C. Toumazou as Principal).

Duration:  3 years (1998-2001)

Partners: Heriot-Watt, British Aerospace, DERA Malvern. (project web page )

 

Abstract: Feasibility study for the development of a Silicon 32x32 crosspoint switch for fibre optic LAN.

We built an IC array of 8 preamplifiers on SiGe HBT, with individual bandwidths exceeding 3 GHz and investigated crosstalk coupling.  We also developed a fully integrated 4x4 switch for 2.5 Gbit/s  per channel, currently under test.

 


EPSRC project (GR/L53786) : Silicon Germanium for MOS applications (HMOS) .

 

Role: Principal investigator (with C. Toumazou as Co-investigator).

Duration: 3 years  (1998-2001)
Partners: Daimler-Chrysler, Siemens, Plessey, U. Southampton , Warwick U. , Glasgow U, Sheffield U. , Newcastle U.

 

Abstract: Development of a viable strained Si and SiGe base CMOS technology. Our role was to evaluate the potential of HMOS for RF circuit design by designing process tolerant circuits for fabrication within the  project . Emphasis on bandpass sampling downconverter /mixers, and performance limitations.