## Gaussian Generators for FPGAs

*Placeholder page for PwCLT generators. Some time I will write something better.*
Many types of stochastic algorithms, such as
Monte-Carlo simulations and Bit-Error-Rate testing, require
very high run-times and are often trivially parallelisable, so
are natural candidates for execution using FPGAs. However,
the applications are reliant on Gaussian Random Number
Generators (GRNGs) with good statistical properties, as very
small biases over trillions of random samples can lead to
incorrect results. Previous hardware GRNGs have focussed
on area-efficient algorithms to produce Gaussian distributions
under idealised assumptions, but do not make statements
about the actual distribution coming out of real fixed-point
hardware. In this paper, we present a new type of GRNG
called a Piecewise-CLT, which uses a weighted blend of many
small smooth distributions to approximate the Gaussian. By
adjusting the weights, it is possible to directly target the
distribution of the Gaussian, resulting in a circuit with an
exactly quantified output distribution. Three members of the
PwCLT family are presented, ranging from medium-area with
good quality, up to a generator providing guaranteed statistical
accuracy out to 12-sigma. We also show that PwCLT provides
a better area-accuracy tradeoff than all existing high-speed
scalar FPGA GRNGs, and can provide extremely high levels
of statistical quality not possible in any previous methods.
### Source code

This is not packaged well right now, it is basically a dump, but it at least
lets people look at the weights I selected:
pwclt-v0.zip

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